Cascade™系列抖动清洁器和网络同步器通过将多个时钟IC和振荡器巩固到IEEE 1588，同步以太网（Synce）和高速Serdes的单个设备中提供时钟系统上芯片。这些MEMS时钟集成了环境的第三代MEMS谐振器并消除了Quartz的依赖关系以及所有石英相关问题。
This integrated MEMS approach, combined with low noise and a feature-rich PLL IC, enable more robust system timing for high reliability systems. Benefits include guaranteed jitter that is not susceptible to noise coupling associated with crystal circuitry, always-accurate frequency synthesis without crystal capacitive mismatching, 10 times more vibration resistant, always-reliable startup in harsh environments, and fast hitless switching to ensure redundancy.
抖动清洁剂
The Cascade MEMS jitter cleaner features 4 Frac-N PLLs with an integrated VCO and loop filter, flexible input-to-output frequency translation from 1 input to 10 outputs, wide frequency range from 8 kHz to 2.1 GHz, and a rich set of programmable features in a small 9 x 9 mm package. By integrating the MEMS resonator, these devices enable designers to create a clock-system-on-a-chip and eliminate all quality and reliability issues associated with traditional quartz-based clocks.
- Always-accurate clock synthesis by eliminating crystal capacitive mismatch
- 即使在寒冷温度和其他恶劣的环境条件下也可以始终可靠启动
- 由于噪声耦合到晶体界面上没有抖动降级
- No activity dips/frequency jumps inherent to quartz
- 10x更耐振动和板弯曲
| Device | 数据表 | 输入数量 | Number of Outputs | 最大。输出频率 | Number of PLL/Clock Domains | 阶段抖动(rms) | Package(mm) |
|---|---|---|---|---|---|---|---|
| SIT95145. | 4. | 10. | 2.1 GHz | 4 PLL.1 time domain | 120 FS. | 9x9 mm，64针 |
Network Synchronizers
The Cascade MEMS network synchronizers features 4 independent time domains, 1 mHz to 4 kHz programmable loop bandwidth and DCO mode with 50-ppt resolution to frequency, and phase recovery from syncE and IEEE 1588. These devices also come with 4 Frac-N PLLs with an integrated VCO and loop filter, flexible input (4) to output (up to 11) frequency translation, wide frequency range from 8 kHz to 2.1 GHz, and a rich set of programmable features in a small 9 x 9 mm package. By integrating the MEMS resonator, these devices enable designers to create a clock-system-on-a-chip and eliminate all quality and reliability issues associated with traditional quartz-based clocks.
- Always-accurate clock synthesis by eliminating crystal capacitive mismatch
- 即使在寒冷温度和其他恶劣的环境条件下也可以始终可靠启动
- 由于噪声耦合到晶体接口上没有抖动降级
- No activity dips/frequency jumps inherent to quartz
- 10x更耐振动和板弯曲
| Device | 数据表 | 输入数量 | Number of Outputs | 最大。输出频率 | Number of PLL/Clock Domains | 阶段抖动(rms) | Package(mm) |
|---|---|---|---|---|---|---|---|
| SIT95147. | 4. | 8. | 2.1 GHz | 4 PLL.s4.time domains | 120 FS. | 9x9 mm，64针 | |
| SIT95148. | 4. | 11. | 2.1 GHz | 4 PLL.s4.time domains | 120 FS. | 9x9 mm，64针 |