低抖动,11输出MEMS时钟发生器

Cascade™SIT95143是一种单芯片MEMS时钟发生器,可针对最高级别的时钟树集成而优化。该时钟系统的芯片(CLKSOC)将多个时钟IC和振荡器整合到单个设备中。其低噪声Quad-PLL架构和可编程输出驱动器提供多达10个差分或20个LVCMOS低抖动时钟输出。它支持亚博电竞4个具有FRAC-N分频器的其他时钟输入,几乎可以从8 kHz到2.1 GHz的任何输入到输出频率转换配置。

This clock generator integrates SiTime’s third-generation MEMS resonator. This integrated MEMS approach eliminates the traditional clock dependency on crystal reference and quartz related issues, and improves system robustness:

  • Always accurate clock synthesis by eliminating crystal capacitive mismatch
  • 即使在寒冷的温度和其他恶劣的环境条件下,始终可靠启动
  • 由于噪声耦合到晶体界面上没有抖动降级
  • 没有活动下降/跳跃固有频率与必要rtz
  • 10x更耐振动和板弯曲

The SiT95143 is supported by TimeMaster™ software that simplifies clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility. The SiT95143 is also supported with theSiT6503EBevaluation board.

单芯片时钟发生器将MEMS谐振器,多个时钟IC和振荡器整合到单个9 x 9 mm 64引脚设备中
Number of Inputs 4.
Number of Outputs 11
输入频率范围 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS)
Output Frequency Range 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS), 1 PPS (one output only)
输出类型 LVPECL,CML,HCSL,LVDS,LVCMOS
Number of PLL/Clock Domains 4.PLL, 1 time domain
工作温度范围(°C) -40到+85
阶段抖动(RMS) 120 fs
Voltage Supply (V) 1.8, 2.5, 3.3
操作模式 自由运行,同步
Package Type (mm²) 9x9 mm,64针
Features Redundant clock inputs with manual switching, DCO mode via I2C or SPI, 5 ppt resolution, programmable output delay control
Availability Sampling

Clock-system-on-a-chip with integrated MEMS, simplifies designs

  • No crystal capacity matching issues, always accurate frequency synthesis
  • No noise coupling onto crystal circuits, guaranteed jitter
  • 耐振动和板弯曲,任何地方PCB放置

Flexible features for the highest level of clock consolidation

  • 11输出,4个独立PLL,最高可达2.1 GHz输出频率,可用于最大频率敏捷性
  • 可单独配置的输出类型和电压,以支持各种处理器和SOC亚博电竞
  • Optional 4 inputs to enable flexible input-output frequency translation
  • In-system programmability via I2C or SPI for further SKU reduction

35% space saving, ideal for high density designs

  • 9 x 9 mm package, no external XTAL/oscillator required

Semiconductor level quality and reliability, eliminates quartz-related issues associated with traditional clocks

  • 时钟树整合更换晶体振荡器(XOS)和缓冲区
  • Low jitter clock frequency translation and generation
  • 10G/100G/400G Ethernet clocking
  • Optical transport network (OTN) clocking for framers, mappers, and processors
  • FPGA,处理器和内存时钟
  • 存储,服务器和数据中心
  • Test and measurement
  • Broadcast video

狭窄:

文档名称 Type
Manufacturing Notes for SiTime Products 其他优质文件

SiT6503EB Evaluation BoardUser Manual

时钟软件的TimeMaster- 简化时钟树设计(联系Silime.

狭窄: