Low Jitter, 10-output MEMS Clock Generator

The Cascade™ SiT95141 is a single-chip MEMS clock generator optimized for the highest level of clock tree integration. This clock-system-on-a-chip (ClkSoC) consolidates multiple clock ICs and oscillators into a single device. Its low noise quad-PLL architecture and programmable output drivers provide up to 10 differential or 20 LVCMOS low-jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input-to-output frequency translation configurations from 8 kHz to 2.1 GHz.

This clock generator integrates SiTime’s third-generation MEMS resonator. This integrated MEMS approach eliminates the traditional clock dependency on crystal reference and quartz related issues, and improves system robustness:

  • Always accurate clock synthesis by eliminating crystal capacitive mismatch
  • Always reliable startup even at cold temperature and in other harsh environmental conditions
  • No jitter degradation because of noise coupling onto a crystal interface
  • No activity dips/frequency jumps inherent with quartz
  • 10倍的抗振动和弯曲

The SiT95141 is supported by TimeMaster™ software that simplifies clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility.The SiT95141 is also supported with theSiT6503EBevaluation board.

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Single-chip clock generator consolidates MEMS resonator, multiple clock ICs and oscillators into a single  9 x 9 mm 64-pin device
Number of Inputs 4
Number of Outputs 10
Input Frequency Range 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS)
Output Frequency Range 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS), 1 PPS (one output only)
Output Type LVPECL, CML, HCSL, LVDS, LVCMO
Number of PLL/Clock Domains 4 PLL, 1 time domain
Operating Temperature Range (°C) -40 to +85
Phase Jitter (rms) 120 fs
Voltage Supply (V) 1.8, 2.5, 3.3
Operating Mode Free running, synchronized
Package Type (mm²) 9x9 mm, 64-pin
Features Redundant clock inputs with manual switching, DCO mode via I2C or SPI, 5 ppt resolution, programable output delay control
Availability Sampling

Clock-system-on-a-chip with integrated MEMS, simplifies designs

  • No crystal capacity matching issues, always accurate frequency synthesis
  • No noise coupling onto crystal circuits, guaranteed jitter
  • Resistant to vibration and board bending, anywhere PCB placement

Flexible features for the highest level of clock consolidation

  • 10 outputs, 4 independent PLLs, up to 2.1 GHz output frequency for maximum frequency agility
  • Individually configurable output types and voltage to support a wide range of processors and SOCs
  • Optional 4 inputs to enable flexible input-output frequency translation
  • In-system programmability via I2C or SPI for further SKU reduction

35% space saving, ideal for high density designs

  • 9 x 9 mm package, no external XTAL/oscillator required

Semiconductor level quality and reliability, eliminates quartz-related issues associated with traditional clocks

  • Clock tree consolidation replacing crystal oscillators (XOs) and buffers
  • Low jitter clock frequency translation and generation
  • 10G/100G/400G Ethernet clocking
  • Optical transport network (OTN) clocking for framers, mappers, and processors
  • FPGA, processor, and memory clocking
  • Storage, servers and datacenters
  • Test and measurement
  • Broadcast video

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Document Name Type
Manufacturing Notes for SiTime Products Other Quality Documents

SiT6503 Eval Board User Manual for Cascade SiT9514x devices– Configure and evaluate device performance

Cascade SiT9514x EVB Software User Manual– Get GUI installation, operation, configuration details

级联SiT9514x 1.30.4 GUI软件版本– Download software .exe file

Cascade SiT9514x GUI Release Notes- Get details on the latest version

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