Low Jitter, 8-output MEMS Network Synchronizer

TheCascade™SIT95147是针对IEEE 1588和时间同步应用程序进行了优化的单芯片MEMS网络同步器。该设备配有4个独立的时间域,1 MHz至4 kHz可编程环路带宽,低漫步模式和最快的无人切换。其低噪声Quad-PLL架构和可编程输出驱动器提供多达8个差分或20个LVCMOS低抖动时钟输出。它支持亚博电竞具有FRAC-N分频器的4个附加时钟输入,几乎可以输入从8 kHz到2.1 GHz的频率转换配置。

This network synchronizer integrates SiTime’s third-generation MEMS resonator. This integrated MEMS approach eliminates the dependency on a crystal reference, along with all quartz related issues, offering a true clock-system-on-a-chip that improves system robustness:

  • Always-accurate clock synthesis by eliminating crystal capacitive mismatch
  • Always-reliable startup even at cold temperature and other harsh environmental conditions
  • No jitter degradation due to noise coupling onto a crystal interface
  • No activity dips/frequency jumps inherent to quartz
  • 10倍的抗振动和弯曲

The SiT95147 is supported by TimeMaster™ software application to simplify clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility. The SiT95147 is also supported with theSIT6502EB.evaluation board.

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Single-chip network synchronizer consolidates MEMS resonator, multiple clock ICs and oscillators into a single 9 x 9 mm 64-pin device
Number of Inputs 4
输出数量 8
Input Frequency Range 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS)
输出频率范围 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS), 1 PPS (one output only)
Output Type LVPECL, CML, HCSL, LVDS, LVCMOS
PLL /时钟域的数量 4 PLLs, 4 time domains
Programmable Loop Bandwidth 1 mHz to 4 kHz
Operating Temperature Range (°C) -40 to +85
Phase Jitter (rms) 120 fs
Voltage Supply (V) 1.8, 2.5, 3.3
操作模式 Free running, synchronized, holdover
包类型(mm²) 9x9 mm, 64-pin
Features Low wander mode, hitless switching, zero-delay buffer mode, DCO with 50-ppt resolution, programmable output delay control
Availability Sampling

带有集成MEMS的时钟系统芯片,简化了设计

  • 没有晶体容量匹配,始终准确的频率合成
  • 没有噪声耦合到晶体电路上,保证抖动
  • Resistant to vibration and board bending, anywhere PCB replacement

最佳IEEE 1588,SYNCE和时序同步性能的灵活功能

  • 4 inputs, 8 outputs, 4 PLLs, up to 2.1 GHz output frequency for flexible frequency translation
  • Individually configurable output types and voltage to support a wide range of processor and SOCs
  • 可编程环路带宽(1 MHz至4 kHz)
  • Low wander mode using precision TCXO for clock recovery and OCXO for holdover
  • 最快的无人切换(Sub 50 PS相累积)

35% space saving ideal for high density designs

  • 9 x 9 mm package, no external XTAL/oscillator required

Semiconductor level quality and reliability, eliminates quartz related issues associated with traditional clocks

  • IEEE 1588 Precision Time Protocol (PTP)
  • Synchronous Ethernet (G.8262, options 1 and 2)
  • JESD204B support
  • 低抖动时钟频率转换和生成
  • 10g / 100g / 400g以太网时钟
  • 用于Framers,Mappers和处理器的光传输网络(OTN)时钟
  • FPGA, processor, and memory clocking
  • Storage, servers and datacenters
  • 测试和测量
  • 广播视频

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Document Name 类型
Manufacturing Notes for SiTime Products Other Quality Documents

SiT6502eval Board用户手册– Evaluate device performance

TimeMaster for Clocks Software(Contact SiTime)– Simplifies clock tree design

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